sunny usa

SPV-10, SLV-10, SPV-02, SLV-02

SPV-10, SPV-02,
SLV-10, SLV-02

    ▶ Ceramic SMD package or Metal Package
    ▶ 3.3V & 2.5V supply voltage
    ▶ Differential LVPECL or LVDS output
    ▶ FUND or MULTI
    ▶ Stability to

20ppm
    ▶ Tri-state function available
    ▶ Reflow soldering is possible
    ▶ Available on tape and reel

ELECTRICAL SPECIFICATIONS

MODEL	LVPECL	LVDS	LVPECL	LVDS
Frequency Range	19.000 to 77.760MHz(Fund)		77.761 to 300.000MHz(Multi)
Operating Temperature Range	0 to + 70 or -40 to +85
Storage Temperature Range	-55 to +125
Frequency Stability	20, 30, 50, 100ppm
Supply Voltage	2.5, 3.3VDC 5%		3.3VDC 5%
Input Current	65(2.5V), 80mA(3.3V) max. 45(2.5V), 55(3.3V)mA max.		80mA max. 55mA max.
Frequency Deviation / Pin 1 Control Voltage	80ppm, 100ppm(STD), 1.65 1.35V (or 1.65V) 80ppm, 100ppm(STD), 1.25 1.05V (or 1.25V)		80, 100(STD), 1.651.35V (or 1.65V)
Linearity	20, 15, 10%
Duty Cycle	50% 5% (50% of Waveform)
Output Voltage Logic Low Output Voltage Logic High	VDD-1.620V max. VDD-1.025V min.	1.1V max. 1.4V min.	VDD-1.620V max. VDD-1.025V min.	1.1V max. 1.4V min.
Output Differential Voltage		247~454mV, 350mV typ. 1.125~1.375V, 1.2V typ.		247~454mV, 350mV typ. 1.125~1.375V, 1.2V typ.
Offset Voltage		1.125~1.375V, 1.2V typ.		1.125~1.375V, 1.2V typ.
Rise / Faill Time	700ps typ., 1.5ns max. (20~80% waveform)		700ps typ., 1.5ns max. (20~80% waveform)
Duty Cycle	5010% (STD), 50 5%(Optional)		5010% (STD), 50 5%(Optional)
Output load	VDD-2.06VDC 50	100 Differential load	VDD-2.06VDC 50	100 Differential load
OE High	0.7VDD min.
OE Low	0.3VDD min.
Pin 2 Tri-state Input Voltage	Enable Low Disable High No Connection (default)	Enable High Disable Low No Connection (default)	Enable Low Disable High No Connection (default)	Enable Low Disable High No Connection (default)
Aging (at 25)	3ppm/ year max.
Start-up Time	10ms max.		10ms max.
Phase Jitter	1ps max. (12kHz to 20MHz)		4ps max. (12kHz to 20MHz)